From e1bec46370549bb9e3427c0b485666873837993a Mon Sep 17 00:00:00 2001 From: Matt Wilson Date: Tue, 7 Aug 2012 08:49:53 +0200 Subject: [PATCH] Although the "Intel Virtualization Technology FlexMigration Application Note" (http://www.intel.com/Assets/PDF/manual/323850.pdf) does not document support for extended model 2H model DH (Intel Xeon Processor E5 Family), empirical evidence shows that the same MSR addresses can be used for cpuid masking as exdended model 2H model AH (Intel Xen Processor E3-1200 Family). Signed-off-by: Matt Wilson Acked-by: Nakajima, Jun Committed-by: Jan Beulich --- xen/arch/x86/cpu/intel.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/cpu/intel.c b/xen/arch/x86/cpu/intel.c index 5633c07854..f26936ae37 100644 --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -104,7 +104,7 @@ static void __devinit set_cpuidmask(const struct cpuinfo_x86 *c) return; extra = "xsave "; break; - case 0x2a: + case 0x2a: case 0x2d: wrmsr(MSR_INTEL_CPUID1_FEATURE_MASK_V2, opt_cpuid_mask_ecx, opt_cpuid_mask_edx); -- 2.30.2